Frequency dividers are used in many electronic systems to produce signals having frequencies lower than those already existing. For example, if a 100 Megahertz (MHZ) signal exists in a system, but a 50 MHZ signal is desired, a frequency divider that divides the frequency by two can be employed.
FIG. 1 shows a prior art frequency divider that divides an input signal frequency by two. Prior art frequency divider 100 includes D-type flip flop 110 and inverter 115. The input signal is applied to the clock input of D-type flip flop 110, which transitions the logical state of the Q output to be equal to the logical state of the D input when the input signal transitions from low to high. Inverter 115 applies to the D input a signal that is opposite in logical state to the Q output, so that the Q output changes logical state in response to the rising edge of the input signal. This results in an output signal with a frequency that is one half of the input signal frequency.
Prior art frequency dividers have maximum operating frequencies, beyond which operation is not reliable. One problem with prior art frequency dividers is low maximum operating frequencies. For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need for alternate methods and apparatus for dividing the frequency of signals.